[CVALE] Question about computer memory.
Rob johnston
Robert.Johnston at Sun.COM
Wed Apr 1 12:33:19 PDT 2009
Terry wrote:
> Greetings !
>
> I have a follow up question ...
>
> Years ago ECC for RAM or Disk required CPU power. This was typically turned off to improve
> application performance.
>
> Is this the case these days?
Not sure about disks, but I think these days the performance impact of
memory ECC is fairly negligible.
Does calculation of disk or RAM error correcting code require cycles
> from the main CPU or has the calculation been moved elsewhere?
It's part of the function of the memory controller. On some (mostly
older) x86 systems this would be a separate ASIC (part of the
motherboard chipset). AMD processors (I think since K8) and the newest
Intel processor have an integrated (on-chip) memory controller.
Also, your on-chip caches - l1, l2 (some chips have l3), instruction and
data caches are also ecc-protected (which is a good thing). After all,
not having ECC means not detecting memory (or cache) errors, which can
lead to silent data corruption.
rob
-------------------------
Robert Johnston
Solaris Core OS
robert.johnston at sun.com
http://blogs.sun.com/robj
-------------------------
> Terry
>
>
>
> Landon Blake wrote:
>> I was looking at a Dell workstation that listed the following items for
>> memory:
>>
>>
>>
>> * Up to 24GB1 <javascript:void(0)> of DDR3 ECC or non-ECC memory
>> for true workstation-level tasks.
>> * 1GB, 1066MHz, DDR3 SDRAM, NECC (1 DIMM)
>>
>>
>>
>> I was wondering what the difference was between these two (2) types of
>> memory. I think the 1GB of SDRAM is the memory I am most familiar with
>> as a programmer. Is the other memory listed some sore of paging
>> mechanism on the hard drive? Or is it something else?
>>
>>
>>
>> Thanks,
>>
>>
>>
>> Landon Memory
>>
>>
>>
>>
>>
>>
>>
>>
>>
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>>
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